Senior CPU HW Performance Architect – CPU Microarchitecture / Performance Modelling / C++ / Python /

Senior CPU HW Performance Architect – CPU Microarchitecture / Performance Modelling / C++ / Python / Workload Analysis / PPA

We are currently partnered with a leading global technology organisation with a major research and development presence in Cambridge, developing next-generation high-performance processor technologies. As part of their continued investment in advanced CPU design, they are looking to appoint a Senior CPU HW Performance Architect to join their CPU Performance team and contribute to the development of next-generation high-performance CPU cores.

Key responsibilities

• Define next-generation CPU microarchitectures and high-level architectural specifications
• Collaborate closely with hardware and software teams to translate system requirements into CPU architectural capabilities
• Develop, maintain, and refine cycle-accurate CPU simulators and functional simulation models
• Build performance models to evaluate new microarchitectural concepts and design alternatives
• Propose innovative CPU microarchitecture features and assess their potential impact
• Evaluate architectural concepts across performance, power, and area (PPA)
• Profile representative workloads to identify CPU and system-level bottlenecks
• Perform sensitivity analysis to understand workload response to different architectural parameters
• Use performance modelling and workload analysis to guide CPU optimisation decisions
• Investigate performance limitations and develop data-driven recommendations for architectural improvements

Key requirements

• BS/MS degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical discipline, combined with significant relevant industry experience, or a PhD
• 6+ years of relevant professional experience in CPU architecture, performance engineering, processor design, or a related field
• Strong understanding of modern CPU microarchitecture
• Deep expertise in CPU architecture and microarchitecture
• Experience taking new microarchitectural concepts or innovations from initial research through implementation and towards silicon
• Hands-on experience developing and using cycle-accurate CPU simulators
• Experience building functional simulators and performance models

Keywords

Senior CPU Performance Architect / CPU HW Performance Architect / CPU Performance Architect / CPU Architect / Senior CPU Architect / Hardware Performance Architect / CPU Microarchitecture / Processor Microarchitecture / CPU Architecture / High-Performance CPU / Processor Design / Performance Engineering / Performance Modelling / Performance Modeling / Cycle-Accurate Simulator / Cycle-Accurate Simulation / Functional Simulator / CPU Simulation / Architectural Simulation / Microarchitectural Exploration / Architectural Exploration / Workload Analysis / Workload Profiling / Workload Characterisation / Sensitivity Analysis / Performance Analysis / Pre-Silicon Performance / CPU Optimisation / CPU Optimization / PPA / Performance Power Area / Fetch / Decode / Branch Prediction / Rename / Dispatch / Out-of-Order / OoO / Execution Units / Load Store / Memory Hierarchy / Cache / Prefetching / C++ / Modern C++ / Python / Software Engineering / Performance Profiling / Debugging

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